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Logic gate
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#	Item
231	Generating Efficient Libraries for use in FPGA Resynthesis Algorithms Andrew Kennings Alan Mishchenko Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2010-03-10 22:06:40 Digital electronics Boolean algebra Arrays Computer performance Lookup table Field-programmable gate array Truth table Programmable logic device Function Mathematics Electronic engineering Computing
232	Microsoft Word - power18.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-07-10 18:57:40 Electronic design Integrated circuits And-inverter graph Field-programmable gate array Logic synthesis Logic gate Sequential logic Power optimization CMOS Electronic engineering Electronic design automation Digital electronics
233	Available online at www.sciencedirect.com Procedia Computer Science[removed] – 54 Proceedings of the 3rd International Conference on Computational Systems-Biology and Bioinformatics (CSBio 2012) Add to Reading List Source URL: www.openwetware.org Language: English - Date: 2012-12-12 14:13:55 Electronics Flip-flop Electrical engineering Hardware description languages Counter Verilog Logic gate Sequential logic Random-access memory Digital electronics Electronic engineering Computer memory
234	Integrating Logic Synthesis, Technology Mapping, and Retiming Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-01 16:05:11 Digital electronics Electronic design Formal methods And-inverter graph Retiming Logic synthesis Automatic test pattern generation Field-programmable gate array Sequential logic Electronic engineering Electronics Electronic design automation
235	74HC Standard Logic Thousands of additional ICs are now available on our website. 74HC Series (Cont.) Minimum order 10 pieces Add to Reading List Source URL: www.jameco.com Language: English - Date: 2007-06-25 15:14:25 Digital electronics Electromagnetism Integrated circuits Digital circuits Computer memory Small-outline integrated circuit Series NOR gate Negated AND gate Electronic engineering Electronics Logic gates
236	Logic Synthesis of Reversible Wave Cascades Portland Quantum Logic Group Alan Mishchenko and Marek Perkowski Department of Electrical and Computer Engineering Portland State University Portland, OR 97207, USA Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-05-17 14:51:54 Algebraic logic Mathematical logic Models of computation Digital electronics Electronic design automation Toffoli gate Quantum gate Canonical form Logic synthesis Logic gates Electronic engineering Theoretical computer science
237	Board-Level Multiterminal Net Assignment Xiaoyu Song1, William N. N. Hung2, Alan Mishchenko1, Malgorzata Chrzanowska-Jeske1, Alan Coppola3 and Andrew Kennings4 1 Department of ECE, Portland State University, Portland, O Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-03-01 13:11:46 Applied mathematics Logic in computer science NP-complete problems Formal methods Boolean algebra Boolean satisfiability problem Field-programmable gate array Conjunctive normal form Routing Theoretical computer science Electronic engineering Electronic design automation
238	Improvements to Technology Mapping for LUT-Based FPGAs Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-02-27 22:53:37 Diagrams And-inverter graph Logic synthesis Field-programmable gate array Directed acyclic graph Algorithm Heuristic function Electronic engineering Electronic design automation Electrical engineering
239	DAG-Aware AIG Rewriting A Fresh Look at Combinational Logic Synthesis Alan Mishchenko Satrajit Chatterjee Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-08 11:02:22 Digital electronics Electronic design Logic in computer science And-inverter graph Logic synthesis Field-programmable gate array American International Group Directed acyclic graph Logic gate Electronic engineering Electronic design automation Formal methods
240	DISCRETE BUFFER/DRIVER P/N: [removed]INSTALLATION MANUAL MANUAL P/N: M930610-00 REV – Add to Reading List Source URL: www.shadin.com Language: English - Date: 2012-11-06 11:21:13 Logic gate Computing Q Data buffer Buffer solution Science Computer memory Arrays Circular buffer

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